Reading yields lane 0’s raw shift and mask value (BASE0 not added).
- INTERP1_ACCUM0_ADD_SPEC
- Values written here are atomically added to ACCUM0
Reading yields lane 0’s raw shift and mask value (BASE0 not added).
- INTERP1_ACCUM0_ADD_R
- Field
INTERP1_ACCUM0_ADD
reader - - INTERP1_ACCUM0_ADD_W
- Field
INTERP1_ACCUM0_ADD
writer - - R
- Register
INTERP1_ACCUM0_ADD
reader - W
- Register
INTERP1_ACCUM0_ADD
writer