Type Alias rp2040_pac::dma::intr::INTR_W

pub type INTR_W<'a, REG> = FieldWriter<'a, REG, 16, u16>;

Field INTR writer - Raw interrupt status for DMA Channels 0..15. Bit n corresponds to channel n. Ignores any masking or forcing. Channel interrupts can be cleared by writing a bit mask to INTR, INTS0 or INTS1.

Channel interrupts can be routed to either of two system-level IRQs based on INTE0 and INTE1.

This can be used vector different channel interrupts to different ISRs: this might be done to allow NVIC IRQ preemption for more time-critical channels, or to spread IRQ load across different cores.

It is also valid to ignore this behaviour and just use INTE0/INTS0/IRQ 0.

Aliased Type

struct INTR_W<'a, REG> { /* private fields */ }