pub struct Peripherals<'a> {
    pub CBP: CBP,
    pub CPUID: CPUID,
    pub DCB: DCB,
    pub DWT: DWT,
    pub FPB: FPB,
    pub FPU: FPU,
    pub ITM: ITM,
    pub MPU: MPU,
    pub SCB: &'a mut SCB,
    pub SYST: SYST,
    pub TPIU: TPIU,
}
Expand description

Core peripherals

This is cortex_m::Peripherals minus the peripherals that the RTFM runtime uses

  • The NVIC field is never present.
  • When the timer-queue feature is enabled the following fields are not present: DWT and SYST.

Fields

CBP: CBP

Cache and branch predictor maintenance operations (not present on Cortex-M0 variants)

CPUID: CPUID

CPUID

DCB: DCB

Debug Control Block (borrowed if the timer-queue feature is enabled)

DWT: DWT

Data Watchpoint and Trace unit (not present if the timer-queue feature is enabled)

FPB: FPB

Flash Patch and Breakpoint unit (not present on Cortex-M0 variants)

FPU: FPU

Floating Point Unit (only present on thumbv7em-none-eabihf)

ITM: ITM

Instrumentation Trace Macrocell (not present on Cortex-M0 variants)

MPU: MPU

Memory Protection Unit

SCB: &'a mut SCB

System Control Block

SYST: SYST

SysTick: System Timer (not present if the timer-queue is enabled)

TPIU: TPIU

Trace Port Interface Unit (not present on Cortex-M0 variants)

Auto Trait Implementations

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Mutably borrows from an owned value. Read more

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